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Verplex Donates Open Verification Language --OVL-- Library to Accellera
MILPITAS, Calif.--(BUSINESS WIRE)--June 11, 2001--Verplex(TM)
Systems, Inc., the electronic design automation (EDA) company known
for its formal verification software, today said it has contributed
the Open Verification Language (OVL) library to Accellera, an
electronics industry standards organization.
OVL provides seamless interoperability between simulation and
formal verification, eliminating the learning curve and accelerating
the acceptance of formal RTL design validation software. The library
was designed using Verilog hardware description language (HDL) and
works with any Verilog HDL-based or mixed-language simulator. It
enables users to quickly find bugs deeply embedded in the design,
where chip- or system-level test vectors may not be long enough to
propagate errors to an observable output.
``Simulation and formal verification are key technologies for
today's designers,'' says C. Michael Chang, president and chief
executive officer (CEO) of Verplex. ``Accellera is noted and well
respected for its efforts in the standardization arena. I can't think
of a better place for OVL to ensure it become an industry standard.''
Additionally, Verplex said it would work cooperatively with
Co-Design Automation Inc., developer of the SUPERLOG® system design
language. The purpose will be to further enable the seamless
interoperability of simulation and formal verification through the use
of common, user-friendly open standards. Areas of cooperation would
include refining and extending capabilities of OVL and the SUPERLOG.
An added benefit of this cooperation will be the extension
simulation and formal verification flows to levels of abstraction
beyond the register transfer level (RTL) of design. More specific
details will be announced soon. (In a separate announcement, Co-Design Automation today announced
it contributed SUPERLOG to Accellera.)
``SUPERLOG is proving effective simulation and verification,'' notes
Simon Davidmann, Co-Design's president and CEO. ``Interest is high in
OVL as well. With formal verification becoming an essential part of
customer flows it is important that Co-Design and Verplex work
together to support next-generation flows incorporating
both simulation and formal verification.''
For more details, contact Dino Caporossi, director of marketing at
Verplex. He can be reached at (408) 586-0387 or via email at
dino@verplex.com.
About Verplex
Verplex Systems Inc. is an electronic design automation (EDA)
company focused on delivering the highest speed, highest capacity and
easiest to use formal verification products for complex system-on-chip
(SOC) design. Founded in 1997, it is privately held and funded by
leading venture capital firms. Corporate headquarters is located at
300 Montague Expressway, Suite 100, Milpitas, Calif. 95035. Telephone:
(408) 586-0300. Facsimile: (408) 586-0230. Email: info@verplex.com.
Online information is found at its web site: http://www.verplex.com.
Verplex and BlackTie are trademarks of Verplex Systems Inc.
Verilog is a trademark of Cadence Design Systems, Inc. Verplex Systems
acknowledges trademarks or registered trademarks of other
organizations for their respective products and services.
Contact:
Nanette Collins
Public Relations for Verplex
(617) 437-1822
nanette@nvc.com
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